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[
VHDL-FPGA-Verilog
]
rom_verilog
Description:
verilog 源代码，非常简单的一种ROM的可综合的写法，适合新手学习之用。-verilog source code，simply implementation of ROM with synthesisable coding-sytle， special for the beginners.
Platform:
|
Size:
1024
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Author:
李海华
|
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Search - verilog coding for rom